Quartzdyne's temperature (QT) and reference (QR) crystals are
the most rugged crystals available. However, our greatest opportunity
for improvement is in reducing QT/QR crystal failures. Data from our 2006 field reliability
report clearly shows that pressure crystals and circuits are less
likely to fail than QR/QT crystals.
Today most QT/QR crystal returns are drive level
sensitive (DLS.) DLS is quantified by measuring the impedance of the
resonant frequency at various drive levels. DLS crystals exhibit
slow-startup or failure to start oscillation. DLS may
be caused by small particulates on the crystal or by other factors
that contribute to variable impedance changes. The action plan to improve
QT/QR crystal startup is twofold: (1) reduce DLS at the crystal level, and
(2) increase the circuit's ability to run marginal crystals. Both
initiatives are already underway:
Reducing DLS Each QT/QR crystal is scanned many times throughout the manufacturing process to screen out DLS failures. We've progressively improved our test specifications and systems in order to reduce the percentage of "escapee" crystals. We are pleased to note that a new process implemented in April has reduced the percentage of DLS QT escapees by threefold (3X.) Later this year we will begin qualifying another process that should further reduce QR/QT DLS.Improving Circuits We are also developing improved circuits that will run marginal crystals. The backbone of this project is an application-specific integrated circuit (ASIC.) We are currently testing a prototype ASIC with gain control logic that "kick-starts" a marginally DLS crystal. So far the results are positive: the ASIC demonstrates rapid startup from 25 to 250°C, the consumption is marginally lower than using discrete components, and it will significantly reduce component count within the hybrid. While there remain many tests yet to perform, we plan to finish a full qualification of the chip by year's end and begin shipping hybrids with ASICs in 2007.
Quartzdyne Electronics (QE) can significantly improve the
life of circuits that you currently use in all of your downhole tools.
Your electronics, built by QE as a hybrid circuit, will gain several
benefits: 100X longer life, higher temperature operation, reduced
circuit size, and rugged packaging for severe downhole
environments. Since 1998 we've deliberately destroyed over
1000 circuits in our lifecycle
tests to demonstrate the value of hybrid
electronics. Although the up-front costs of die
acquisition and layout are higher, the revenue generated from increased
tool up-time can easily compensate for the initial investment.
Quartzdyne launched QE this year in response
to customers' needs to upgrade from surface-mount and through-hole circuits
to hybrid technology. By leveraging our hard-earned experience and
know-how on hybrid circuits, QE will manufacture your hybrid to the
high standard you've come to expect from Quartzdyne transducer
hybrids. Our techniques
and specialized materials ensure resilient component attachment
and exceptional wirebonds. QE will screen and qualify your
custom hybrid circuit prior to shipment, just as we do for hybrids
used in our transducers:
• 125 hours at 225°C
• 15 thermal cycles, 25-225°C
• 10 metal-to-metal shocks following
aging/cycling
If you're ready to hybridize a circuit, or improve the
reliability of an existing hybrid design, contact QE today at QEsales@quartzdyne.com.
QE's website is under construction at www.quartzdyne.com/electronics.
Power-On Reset Issue
with Digital-Output Transducers
We have discovered a power-on
reset problem with all digital-output transducers. Some FPGA and
EEPROM devices do not come out of power-on reset gracefully. When this occurs, the slave holds the
SDA line low, preventing further communication. Some transducers
exhibit a power-on reset problem during a status or FPGA ID query once in
ten samples; others get stuck once in a hundred or more power-on
cycles.
The master can clear this condition by
issuing 9 clock pulses while allowing the SDA line to float, followed by a STOP
bit. This clears all transducers on
the I2C bus. We strongly advise
all of our digital-output transducer customers to implement this
procedure for robust communications. (There are various events that
could initiate a communications latch; the host controller is responsible
to clear the bus using this procedure per I2C
protocol.)
The
EEPROM has also demonstrated the aforementioned power-on reset
problem. It can be cleared using the same 9-clock-pulse method described
above. The power-on reset problem with the EEPROM can be avoided
altogether by issuing a current address read prior to sending any other
commands to the EEPROM.
In August we modified the FPGA
firmware to make the start-up routine more robust. This new firmware
revision is C2 (0D020302 for SMT; 0D050302 for HYB). While the likelihood
of a communications latch-up is significantly reduced with this revision,
we still recommend implementing the I2C reset protocol whenever a bus
conflict is detected. The digital-output transducer manual
is available online at http://www.quartzdyne.com/pdfs/DigitalTransProg.PDF.
RoHS and WEEE Compliance
by Exception
The certificate is provided for end users
that manufacture products indicated below, and who plan to take the exemption
provided in Section 1 of Article 2 (“Scope”) or in Section 7 of the Annex
(“Exemptions”) of the European Union’s Restriction on the Use of Hazardous
Substances in Electrical and Electronic Equipment (“RoHS”) Directive,
2002/95/EC.
INDICATED PRODUCTS COVERED UNDER THIS
EXEMPTION:
• Monitoring and control
instruments used in laboratory or industrial installations
• Products containing lead in high
melting temperature type solders (i.e., tin-lead solder alloys containing more
than 85% lead)
Since Quartzdyne’s products are used
exclusively to monitor pressure and temperature in oil and gas exploration and
production, our transducers clearly fall outside the scope of RoHS. We use HMP
solder (Sn5/Pb93.5/Ag1.5) for its high-temperature properties in all Quartzdyne
transducers. Transducers supplied with surface-mount circuits use Sn63
(Sn63/Pb37) solder for optimum reliability. Life-Cycle tests conducted at 150°C
on surface-mount assemblies manufactured with RoHS-compliant SAC solder survive
less than half that of an Sn63 assembly. We will continue to search for a
RoHS-compliant soldering process that does not compromise circuit
life.
Although our products are currently
exempt from RoHS, we support efforts to reduce environmental pollution,
and, therefore, intend to comply with the spirit of the RoHS initiative.
We will adhere to the RoHS restrictions whenever it is possible to do so,
while maintaining the high temperature capability and reliability
of our products. Please see http://www.quartzdyne.com/pdfs/RoHS.pdf.
5% Price Increase in
January 2007
Our prices have not
kept up with the rising costs of labor, benefits, overtime, materials, energy,
and general increases. Please review our 2007 pricesheet and
prepare your 2007 budgets accordingly.
Visit Quartzdyne at
SPE
We invite you to visit Quartzdyne and
QE in booth 3914 during the SPE Annual Technical Conference
and Exhibition in San Antonio between September 25-27. Please contact
us at sales@quartzdyne.com if you would
like a complimentary daypass. We look forward to seeing you
there!
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